The present invention relates to a multi-output DC-DC converter, for use in a variety of electronic appliances, configured to receive a DC voltage from a battery or the like and to supply controlled DC voltages to a plurality of loads.
An apparatus having a circuit configuration shown in FIG. 8 has been used conventionally as a multi-output DC-DC converter. The input DC voltage Ei of a DC power supply 1 is input to the conventional multi-output DC-DC converter shown in FIG. 8. A main switch 3 formed of an N-MOSFET, an inductor 2, a diode 4 and a first output capacitor 5 are provided to constitute a boost converter (step-up converter). A first output voltage Vo1 is output from the first output capacitor 5 to a first load 6. A control circuit 7 adjusts the ON/OFF period ratio of the main switch 3 to control the first output voltage Vol. The first output voltage Vo1 is stepped down by a series. regulator 8 and output as a second output voltage Vo2 from a second output capacitor 9 to a second load 10.
The operation of the boost converter shown in FIG. 8 will be described below briefly.
First, when the main switch 3 is ON, the input DC voltage Ei is applied to the inductor 2. At this time, a current flows through the inductor 2 and magnetic energy is stored. Next, when the main switch 3 becomes OFF, the magnetic energy stored in the inductor 2 is released via the diode 4 as a current for charging the first output capacitor 5. When it is assumed that the main switch 3 is turned ON/OFF in a constant cycle, the energy output via the inductor 2 in each cycle is higher as the ON period of the main switch 3 is longer, and the first output voltage Vo1 is higher as the ON period of the main switch 3 is longer. In other words, the control circuit 7 controls the first output voltage Vo1 by adjusting the ON/OFF period ratio of the main switch 3. On the other hand, the second output voltage Vo2 obtained from the first output voltage Vo1 is output via the series regulator 8.
In the conventional multi-output DC-DC converter configured as described above, a loss due to the series regulator 8 was caused, thereby lowering conversion efficiency. In addition, since the conventional multi-output DC-DC converter used a configuration comprising a plurality of switching converters, such as the above-mentioned boost converter, to obtain multiple outputs, the number of components increased, whereby an apparatus incorporating such converters was made larger in size and higher in cost.
FIG. 9 is a circuit diagram showing a three-output boost converter configured to control a plurality of outputs by using less number of components (see Official Gazette of Japanese Examined Patent Publication No. Hei 7-40785, for example). Numerals assigned to components shown in FIG. 9 are the same as those shown in the drawings disclosed in the Official Gazette of Japanese Examined Patent Publication No. Hei 7-40785. By the application of an input V11, magnetic energy is stored in an inductor L during a period while a switch S1 makes contact with its contact A. The magnetic energy is released to each output during a period while the switch S1 makes contact with its contact B. At that time, the magnetic energy is distributed to each output via a switch S2. The Official Gazette of Japanese Examined Patent Publication No. Hei 7-40785 discloses a method of controlling the period while the switch S2 makes contact with each contact thereof so that all the output voltages are stabilized and of controlling the switch S1 so that power is supplied to all loads just sufficiently.
An invention having a configuration based on a technical concept similar to that of the Official Gazette of Japanese Examined Patent Publication No. Hei 7-40785 but adopting a different control method has also been proposed (see U.S. Pat. No. 5,400,239, for example). U.S. Pat. No. 5,400,239 discloses an insulating flyback converter having N outputs and being characterized in that N rectifying and smoothing circuits are connected to one output winding of a transformer via a switching transistor corresponding to the switch S2 of the boost converter shown in FIG. 9. In U.S. Pat. No. 5,400,239, the switching frequency of a main switching transistor corresponding to the switch S1 is divided by N and allocated to the control of each output. In other words, the switching transistor corresponding to the switch S2 in U.S. Pat. No. 5,400,239 is switched at 1/N of the switching frequency. The ON period of the main switching transistor corresponding to the switch S1 is adjusted in each switching cycle, whereby each output voltage is controlled.
A configuration wherein an inductor is commonly used for a plurality of boost converters is obtained by applying the conventional control method disclosed in U.S. Pat. No. 5,400,239 to the conventional multi-output converter shown in FIG. 8. FIG. 10 is a circuit diagram of a boost converter having two outputs, serving as a simple application example of this configuration. FIG. 11 is a diagram. showing the waveforms of signals at the main sections of the configuration. The application example will be described below in detail.
In the boost converter having two outputs, shown in FIG. 10, an input DC voltage Ei is input from an input DC power supply 1. The boost converter comprises an inductor 2, a main switch 14, an auxiliary switch 15, a diode 11, a first output capacitor 5, a diode 12 connected in series with the auxiliary switch 15, a second output capacitor 9 and a control circuit 16. The main switch 14 and the auxiliary switch 15 are each formed of an N-MOSFET, for example. The control circuit 16 controls the main switch 14 and the auxiliary switch 15 so that they are driven in accordance with their respective predetermined ON and OFF periods.
In the boost converter having two outputs configured as described above and shown in FIG. 10, a first output voltage Vo1 is output from the first output capacitor 5 to a first load 6, and a second output voltage Vo2 is output from the second output capacitor 9 to a second load 10. The input/output conditions are represented by Vo1 >Vo2> Ei. When the auxiliary switch 15 is OFF, the inductor 2, the main switch 14, the diode 11 and the first output capacitor 5 constitute a boost converter. On the other hand, when the auxiliary switch 15 is ON, the inductor 2, the main switch 14, the diode 12 and the second output capacitor 9 constitute a boost converter.
In the control circuit 16, an output detection circuit 17 detects the first output voltage Vo1 and the second output voltage Vo2. Furthermore, the output detection circuit 17 outputs error voltages Vel and Ve2 respectively obtained by amplifying the error between the detected output voltage Vo1 and its desired value and by amplifying the error between the detected output voltage Vo2 and its desired value. An oscillation circuit 18 outputs a sawtooth voltage Vt and a clock signal Vt1 each having a predetermined cycle T. A PWM circuit 19 outputs a signal V1 obtained as the result of the comparison between the error voltage Ve1 and the sawtooth voltage Vt and also outputs a signal V2 obtained as the result of the comparison between the error voltage Ve2 and the sawtooth voltage Vt.
A frequency divider circuit 20 receives the signal Vt1 and outputs a frequency-divided signal Vt2. A drive circuit 21 receives the signal V1, the signal V2 and the frequency-divided signal Vt2 and outputs a drive signal Vg14 for the main switch 14 and a drive signal Vg15 for the auxiliary switch 15. Furthermore, as the drive signal Vg14 from the drive circuit 21, the signal V1 is selected and output when the frequency-divided signal Vt2 is low, and the signal V2 is selected and output when the frequency-divided signal Vt2 is high.
FIG. 11 is a diagram showing the waveforms of the various signals in the boost converter having two outputs shown in FIG. 10 and the waveform of a current IL flowing through the inductor 2.
The operation of the conventional multi-output DC-DC converter during its normal operation will be described below by using FIGS. 10 and 11.
First, it is assumed that at time t0 in FIG. 11, the frequency-divided signal Vt2 is driven low by the clock signal Vt1 and the sawtooth voltage Vt starts rising. At this time, the frequency-divided signal Vt2, that is, the drive signal Vg15, is low, whereby the auxiliary switch 15 becomes OFF. On the other hand, the signal V1 obtained as the result of the comparison between the sawtooth voltage Vt and the error voltage Ve1 becomes high, and this signal is output as the drive signal Vg14. In other words, the main switch 14 becomes ON, the input DC voltage Ei is applied to the inductor 2, and magnetic energy is stored.
When the signal V1 becomes low at time t1, the drive signal Vg14 becomes low, and the main switch 14 becomes OFF. At this time, the magnetic energy stored in the inductor 2 is released as a current for charging the capacitor 5 via the diode 11 since the auxiliary switch 15 is OFF. This current decreases and becomes zero soon.
At time t2, the frequency-divided signal Vt2 is driven high by the clock signal Vt1, and the sawtooth voltage Vt lowers abruptly and then starts rising again. At this time, the drive signal Vg15 becomes high, and the auxiliary switch 15 becomes ON. On the other hand, the signal V2 obtained as the result of the comparison between the sawtooth voltage Vt and the error voltage Ve2 becomes high and is output as the drive signal Vg14. In other words, the main switch 14 becomes ON. At this time, the input DC voltage Ei is applied to the inductor 2, and magnetic energy is stored.
When the signal V2 becomes low at time t3, the drive signal Vg14 becomes low, and the main switch 14 becomes OFF. At this time, the magnetic energy stored in the inductor 2 is released as a current for charging the capacitor 9 via the diode 12 since the auxiliary switch 15 is ON. This current decreases and becomes zero soon.
At time t4, the drive signal Vg15 becomes low, and the operation at time t0 and thereafter is repeated.
The following equations (1) and (2) are established assuming that the inductance of the inductor 2 is L, that the ON period of the main switch 14 while the auxiliary switch 15 is OFF is Ton1, that the ON period of the main switch 14 while the auxiliary switch 15 is ON is Ton2, that the output current to the first load 6 is Io1, and that the output current to the second load 10 is Io2.
                    Vo1        =                  Ei          +                                                    (                                  Ei                  ·                  Ton1                                )                            2                                      4              ⁢                              L                ·                T                ·                Io1                                                                        (        1        )                                Vo2        =                  Ei          +                                                    (                                  Ei                  ·                  Ton2                                )                            2                                      4              ⁢                              L                ·                T                ·                Io2                                                                        (        2        )            
In the conventional boost converter having two outputs, configured as described above, the error voltages Ve1 and Ve2 change so that the first and second output voltages Vo1 and Vo2 are stabilized to their respective desired voltages, whereby the ON period of the main switch 14 is adjusted. In other words, the two boost converters wherein the main switch 14 and the inductor 2 are commonly used are subjected to time-sharing control at half the oscillation frequency of the oscillation circuit 18. Hence, the first and second output voltages Vo1 and Vo2 are stabilized to their respective desired voltages.
As described above, the conventional multi-output DC-DC converter shown in FIG. 8 had a problem of causing a loss due to the series regulator and thereby having low conversion efficiency. In addition, since the conventional multi-output DC-DC converter shown in FIG. 8 used a configuration comprising a plurality of switching converters, such as boost converters, to obtain multiple outputs, the number of components increased, whereby an apparatus incorporating such converters was made larger in size and higher in cost.
On the other hand, in the configuration of the conventional multi-output DC-DC converter shown in FIG. 9, the number of components is decreased by commonly using the inductor, whereby a plurality of outputs can be controlled at high efficiency. In the configuration of the conventional multi-output DC-DC converter shown in FIG. 9, in the case of the control method disclosed in the Official Gazette of Japanese Examined Patent Publication No. Hei 7-40785, the magnetic energy is stored in the inductor L during a period while the switch S1 makes contact with its contact A. This magnetic energy is distributed to each output by the switching operation of the switch S2 during a period while the switch S1 makes contact with its contact B. However, for example, in the case of the converter having three outputs shown in FIG. 9, when the above-mentioned control method is Used, it is necessary to control four periods in one switching cycle of the switch S1. The four periods are a period while the switch S1 makes contact with its contact A, a period while the switch S1 makes contact with its contact B and the switch S2 distributes the magnetic energy to a first output, a period while the switch S1 makes contact with its contact B and the switch S2 distributes the magnetic energy to a second output, and a period while the switch S1 makes contact with its contact B and the switch S2 distributes the magnetic energy to a third output. A switching converter can be made smaller by raising its switching frequency. However, in the method of controlling the above-mentioned four periods, it was difficult to raise the switching frequency. Furthermore, there was a problem of causing switching losses and switching noise during the switching operation of the switch S2.
The above-mentioned problem of being difficult to raise the switching frequency can be solved, just as in the case of the converter disclosed in U.S. Pat. No. 5,400,239, more specifically, by applying the control method wherein the switching frequency is divided and assigned to the control of each output. This is described above by taking the boost converter having two outputs as an example and by using. FIGS. 10 and 11. However, in the conventional converter configured as shown in FIG. 10, the current flowing through the inductor 2 did not become zero in some cases during the OFF period of the main switch 14. In a converter, the current flowing through the inductor 2 is desired to be zero during the OFF period of the main switch 14 because of the following reason.
For example, in the multi-output DC-DC converter shown in FIG. 10, in the case when the first output current Io1 is large and the current flowing through the diode 11 does not become zero during the OFF period of the main switch 14, the current IL flowing through the inductor 2 has the waveform shown in FIG. 12. At this time, the output voltages Vo1 and Vo2 are represented by the following equations (3) and (4).
                              Vo1          =                                                                      T                  +                  Ton1                                                  T                  -                  Ton1                                            ·              Ei                        -                                          4                ⁢                                  L                  ·                  T                  ·                  Io1                                                                              (                                      T                    -                    Ton1                                    )                                2                                                    ⁢                                                      (        3        )                                Vo2        =                  Ei          +                                                    {                                                                            (                                              T                        +                        Ton2                                            )                                        ·                    Ei                                    -                                                            (                                              T                        -                        Ton1                                            )                                        ·                    Vo1                                                  }                            2                                      4              ⁢                              L                ·                T                ·                Io2                                                                        (        4        )            
The first output voltage Vo1 can be controlled by adjusting the ON period Ton1 in accordance with the change of the output current Io1. However, since the current flowing through the diode 11 does not become zero during the OFF period of the main switch 14, there is a restriction represented by Vo1<Ei·T/(T−Ton1). Hence, even when Ton2=0, the numerator of the second term in Equation (4) for obtaining the second output voltage Vo2 has a value larger than zero. Therefore, in the case when the output current Io2 is small, the second output voltage Vo2 rises and becomes uncontrollable. At the time of starting when the output has not risen sufficiently or when one of the outputs is overloaded and the voltage of the output lowers, the current flowing through the inductor 2 does not become zero during the OFF period of the main switch 14. In other words, the phenomenon shown in FIG. 12 occurs as a problem.